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芯片剥层技术在集成电路失效分析中的应用 被引量:6

Delayer technology applying in failure analysis
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摘要 随着集成电路向多层结构方向的发展,对芯片进行失效分析必须解决多层结构下层的可观察性和可测试性。本文介绍了失效分析中去钝化层、金属化层和层间介质等的各种方法,包括湿法腐蚀、反应离子刻蚀和FIB刻蚀等方法,结合图例进行剥层前后对比分析,并通过实例说明剥层技术在集成电路失效分析中的重要作用。 With the development of multi-layer structure chip, it must be observable and testable for lower layer in failure analysis. In this paper, the technology of removal of passivation, metallization, dielectric layer was introduced including chemical corrosion, reactive ion etching and FIB etching. Appearances before and after delayer were contrasted. And an example was provided to show the important role of delayer technology in failure analysis for integrated circuit.
作者 陈媛 李少平
出处 《电子产品可靠性与环境试验》 2009年第B10期10-14,共5页 Electronic Product Reliability and Environmental Testing
关键词 失效分析 钝化层 金属化层 层间介质 剥层技术 Failure analysis, passivation, metallization, dielectric layer, delayer technology
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  • 1Proc. IEEE Int' 1 Rehabihty Physics Symp., various years.
  • 2WAGNER L C. Failure Analysis of Integrated Circuits Tools and Techniques [M] . Boston: Kluwer Academic Publishers, 1999.
  • 3R. Boylan, M. Ward, and D. Tuggle, " Failure Analysis of Micron Technology VLSI Using Focused Ion Beams." Proc. Int. Symp. for Testing and Failure Analysis, pp. 249-255, Nov. 1989.
  • 4D. J. Larson, D. T. Foord, A. K. Pefford-Long, H. Liew, M. G. Blamire, A. Cerezo, and G. D. W. Smith, " Field-ion specimen preparation using focused ion-beam milling." Ultramicroscopy 79:287 1999.

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