摘要
针对数字预失真系统中的环路时延问题,提出一种自适应的小数时延估计算法,可以准确地估计数字预失真系统的环路小数时延,确保数字预失真参数提取的正确性。该算法采用多点平均的方法,消除估算误差对算法性能的影响,从而提高估计算法的精确度和稳定性。仿真结果表明:与以往文献提出的小数时延估计算法相比,提高了小数时延估计的精确度和稳定性,精确度可以达到采样时刻间隔的1.4%。而且,该方法可自适应地更新小数时延,更加容易应用于硬件实现中。
A novel fractional delay estimation based on the adaptive algorithm is proposed to estimate the loop fractional delay in order to solve the problem of loop delay in Digital Predistortion(DPD) system. The high accuracy of estimation guarantees the correct extraction of the digital predistortion's parameters. The proposed algorithm can improve accuracy and robustness of the fractional delay estimation by multi-point average, which eliminates the effect of the estimation error. Simulation results demonstrate the proposed algorithm has higher accuracy and robustness than the state-of-the-art algorithms, in which the accuracy increases to 1.4% of one sampling time period. The proposed algorithm can adaptively update the fractional delay in the system, which is of significance in the hardware implementation.
出处
《太赫兹科学与电子信息学报》
2016年第1期96-100,111,共6页
Journal of Terahertz Science and Electronic Information Technology
关键词
小数环路时延估计
自适应
预失真
功放
loop fractional delay estimation
adaptive
Digital Predistortion
Power Amplifier(PA)
