期刊文献+

不同结构参数下QFP封装的随机振动分析 被引量:8

Random vibration analysis of QFP with different structure parameters
在线阅读 下载PDF
导出
摘要 基于ABAQUS软件,对不同结构参数下QFP封装的随机振动响应进行了分析,获取了整体封装结构及焊点阵列的应力分布云图,并研究了引线宽度、引线间距、引线高度等不同参数对QFP封装器件应力场的影响规律.结果表明,在随机振动载荷下,QFP封装器件的焊点阵列为整体结构的薄弱环节,且最大应力位置出现在焊趾部位,即焊点最外侧的尖角处;在焊点的焊趾部位以及引线与焊点交界处存在明显的应力集中现象,上述两处将成为焊点最可能发生破坏的区域;QFP封装器件的最大应力值与引线间距和引线高度成正比,与引线宽度成反比. Random vibration responses of QFP with different structure parameters were analyzed based on the ABAQUS software. The stress distributions of whole packaging and solder joints were obtained. The influence regularities of different lead widths,lead distances and lead heights on the stress field of QFP have been studied. The results indicate that,under the random vibration loading,the solder joints are weak components of QFP.The maximum stress focuses on the sharp corner of exterior part of the solder joints. Stress concentration areas locate at that position and the junction of lead with solder joint,which will be the most likely failure regions. The maximum stress of QFP is in direct proportion to the distance and height of lead and in inverse proportion to the width of lead.
出处 《焊接学报》 EI CAS CSCD 北大核心 2015年第11期21-24,114,共4页 Transactions of The China Welding Institution
基金 国家自然科学基金资助项目(51305268) 上海市自然科学基金资助项目(15ZR1428200)
关键词 随机振动 四边扁平封装 影响规律 焊点 random vibration quad flat packaging influence regularities solder joint
  • 相关文献

参考文献9

  • 1韦何耕,黄春跃,梁颖,李天明,吴松,郭广阔.热循环加载条件下PBGA叠层无铅焊点可靠性分析[J].焊接学报,2013,34(10):91-94. 被引量:28
  • 2Chawla N. Thermal fatigue behavior of Sn-rich (Pb-free) solders [ J]. Metallurgical and Materials Transactions A, 2008, 39A: 799 - 810.
  • 3尹立孟,Michael Pecht,位松,耿燕飞,姚宗湘.焊点高度对微尺度焊点力学行为的影响[J].焊接学报,2013,34(8):27-30. 被引量:13
  • 4Ubachs R, Schreurs P, Geers M. Elasto-viscoplastic nonlocal damage modeling of thermal fatigue in anisotropic lead-free solder [J].MechanicsofMaterials,2007,39(7):685-701.
  • 5王欢,杨平,谢方伟,席涛.复合加载下焊点寿命的数值模拟[J].焊接学报,2012,33(12):65-68. 被引量:5
  • 6Tan V B C, Tong M X. Finite element modeling of electronic packages subjected to drop impact [ J ]. IEEE Transactions on Components and Packaging Technologies, 2005, 28 ( 3 ) : 555 - 560.
  • 7Lai Y S, Wang T H. Optimal design towards enhancement of board-level thermal mechanical reliability of wafer-level chip scale packages [ J ]. Microelectronics Reliability, 2007, 47 ( 1 ) : 104 - 110.
  • 8Vandevelde B, Degryse D, Beyne E, et al. Modified micro mac- ro thermo-mechanieal modeling of ceramic ball grid array packa- ges[ J ]. Microclectronies Reliability, 2003, 43 (2) : 307 - 318.
  • 9Lira C T, Teo Y M, Shim V P W. Numerical simulation of the drop impact response of a portable electronic product[ J]. IEEE Transactions on Components and Packaging Technologies, 2002, 25(3) : 478 -485.

二级参考文献19

  • 1薛松柏,吴玉秀,崔国平,张玲.热循环对QFP焊点强度及其微观组织影响规律的数值模拟[J].焊接学报,2006,27(11):1-4. 被引量:15
  • 2Barker D B, Vodzak J, Dasgupta A, et al. Combined vibrational and thermal solder joint fatigue: a generalized strain versus life approach[ J]. Journal of Electronic Packaging, 1990, 112:129 - 134.
  • 3Upadhyayula K, Dasgupta A. An incremental damage superposi- tion approach for reliability of electronic interconnects under com- bined accelerated stresses[ C ] J/9th Symposium on Mechanics of Surface Mount Technology, 1997 : 16 - 21.
  • 4Eckert T, Kriiger M, MOiler W H, et al. Investigation of the solder joint fatigue life in combined vibration and thermal cycling tests[C] // The Proceedings of the 60th Electronic Component and Technology Conference, 2010:1209 -1216.
  • 5Jiao Guoqin, Yin Jinghua, Hua Qing, et al. Study of thermo-me- chanical stress distribution for CBGA package[ C ]// 10th Elec- tronics Packaging Technology Conference, 2008 : 910 - 915.
  • 6Chaboche J L. On some modifications of kinematic hardening to improve the description of ratcheting effects[ J]. Journal of Plas- ticity, 1991 (7) : 661 -678.
  • 7Shang Deguang, Wang Dejun. A new multiaxail fatigue damage model based on the critical plane approach[ J]. Fatigue, 1998, 20(3) : 241 -245.
  • 8Upadhyayula K. An incremental damage superposition approach for surface mount electronic interconnect durability under com- bined temperature and vibration environments [ D ]. Department of Mechanical Engineering, University of Maryland, College Park, MD, 1999.
  • 9Yan K W, Johnson R W, Stapleton R, et al. Double bump flip- chip assembly [ J ]. IEEE Transactions on Electronics Packaging Manufacturing, 2006, 29(2) : 119 - 133.
  • 10Ong J M G, Tay A A O, Zhang X, et al. Optimization of the ther- momechanical reliability of a 65 nm Cu/low-K large-die flip chip package [ J ]. IEEE Transactions on Components and Packaging Technologies, 2009, 32 (4) : 838 - 848.

共引文献40

同被引文献114

引证文献8

二级引证文献35

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部