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低电压低功耗CMOS 5Gb/s串行收发器 被引量:2

A Low Voltage Low Power CMOS 5Gb/s Transceiver
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摘要 设计并实现了一种使用0.13μm CMOS 工艺制造的低电压低功耗串行收发器.它的核心电路工作电压为1V,工作频率范围为2.5-5GHz.发送器包括一个20:1的串行器和一个发送驱动器,其中发送驱动器采用了预加重技术来抵消传输信道对信号的衰减,降低信号的码间串扰.接收器包括一个输入信号预放大器,两个1:20的解串器以及时钟恢复电路.在输入信号预放大器中设计了一个简单新颖的电路,利用前馈均衡来进一步消除信号的码间串扰,提高接收器的灵敏度.测试表明,收发器功耗为127mW/通道.发送器输出信号均方根抖动为4ps.接收器在输入信号眼图闭合0.5UI,信号差分峰-峰值150mV条件下误码率小于10^-12. A low voltage and low power SerDes transceiver implemented in 0.13μm CMOS is described. The power supply voltage is 1V, and the operating frequency range is from 2.5 to 5GHz. The transmitter includes a 20 : 1 serializer and a transmission driver,the latter of which uses pre-emphasis architecture for channel compensation. The receiver employs two 1 : 20 deserializer,an input signal pre-amplifier,and a clock and data recovery circuit. The pre-amplifier employs a novel architecture,consisting of a feed-forward equalizer to cancel ISI. The measured transceiver power consumption is 127mW/channel. The RMS jitter of the transmitter output is 4ps. Test results indicate the receiver BER is less than 10^-12 when the input signal amplitude is 150mV differential peak to peak and the eye closure is 0.5UI.
出处 《Journal of Semiconductors》 EI CAS CSCD 北大核心 2007年第8期1283-1288,共6页 半导体学报(英文版)
关键词 低电压 低功耗 收发器 均衡 low voltage low power transceiver equalization
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参考文献6

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