摘要
提出一种基于MEMS敏感结构芯片与专用集成电路芯片(ASIC)集成封装的硅微谐振加速度计设计方案。敏感结构主要包括敏感质量块、一级微杠杆放大结构和双端固定音叉谐振器。整体结构采用左右差分对称布局,实现器件高灵敏度。敏感结构芯片基于全硅晶圆级封装工艺,实现敏感结构芯片的低应力与批量化加工。敏感结构芯片与ASIC芯片采用堆叠式集成封装,实现器件的小型化与低功耗。所设计加速度计的谐振频率约为18.2 kHz,量程为±20 g_(n),标度因数为216 Hz/g_(n),标度因数稳定性为5×10^(-6),零偏稳定性为6.5μg_(n)(1σ,10 s)。所提方案实现了器件的小型化、低功耗与集成化。
A design scheme of silicon microresonant accelerometer based on MEMS sensitive structure chip and application specific integrate circuit(ASIC)chip is proposed.The sensitive structures mainly include sensitive mass,one-stage microlever amplification structure and double-ended tuning fork resonator.The overall structure adopts left-right difference symmetrical layout to achieve high sensitivity.The sensitive structure chip is fabricated by the silicon wafer-level packing technology,which can realize the sensitive structure chip with low stress and batch processing.The sensitive structure chip and ASIC chip are integrated in package with stacking form to achieve miniaturization and low power consumption.The resonant frequency of the designed accelerometer is about 18.2 kHz,The range is±20g_(n),the scale factor is 216 Hz/g_(n),scale factor stability is 5×10^(-6),and the zero bias stability is 6.5μg_(n)(1σ,10 s).The scheme realizes the device with miniaturization,low power consumption and integration.
作者
高乃坤
刘福民
徐杰
高适萱
王学锋
阚宝玺
GAO Naikun;LIU Fumin;XU Jie;GAO Shixuan;WANG Xuefeng;KAN Baoxi(Beijing Institute of Aerospace Control Instruments,Beijing 100039,China)
出处
《传感器与微系统》
CSCD
北大核心
2024年第4期112-114,118,共4页
Transducer and Microsystem Technologies
关键词
硅微谐振加速度计
差分检测
集成封装
micromechanical silicon oscillating accelerometer
difference detection
integrated packaging
