摘要
高压大功率电力电子器件内部电场的准确计算,是保证器件绝缘设计满足要求的基本条件。首先,在静态场下建立考虑封装绝缘结构和芯片半导体载流子输运过程的耦合电场计算模型,并利用高压芯片反向特性测量平台,测量获得3300V高压芯片的耐受电压,与文中所建立模型的计算结果相对比,结果表明,计及芯片和封装耦合后,芯片耐受电压的计算结果与测量结果之间的误差由不考虑封装时的4.96%降低为0.8%。此外,以文中所使用的3300V高压芯片终端结构为例,应用耦合电场计算模型,计算在不同电压下的弹性压接封装结构下电场的分布分布特性,计算结果表明在2000V下,计及封装和芯片耦合后,芯片内部最大电场为不考虑封装结构时的1.24倍,且最大电场由终端区中部转移到末端。随着施加电压的增加,封装绝缘结构对于芯片电场的影响逐渐增大,芯片终端区表面电场显著增加甚至超过芯片内的最大电场。最后,利用部分电容模型,给出外部封装对于芯片电场影响的机理解释,并分析半导体–绝缘体界面电荷密度以及外部封装绝缘材料的介电常数对于芯片电场的影响规律,该文的结果可为高压大功率器件绝缘设计提供参考。
The accurate calculation and analysis of the electric field of high-voltage and high-power power electronic devices can be the basis to ensure that the insulation design of the device meets the requirements. First, this paper establishs a union electric field calculation model considering the insulation structure of packaging and the chip semiconductor carrier transport processing under electrostatic field. By the high-voltage chip reverse characteristic measurement platform, the damage voltage of the 3300V chip was measured. The result show that the error between the calculation result of the proposed model and the measurement result is reduced from 4.96% to 0.8% by considering the packaging. In addition, taking this 3300V high-voltage chip termination structure as an example, based on this model, the electric field distribution of the elastic press-pack IGBT device under different voltages was calculated. Under the condition of 2000V, after taking into account the coupling of the package and the chip, the maximum electric field inside the chip is 1.24 times of that without considering the packaging structure, and the maximum electric field is transferred from the middle field ring to the end. As the applied voltage promoting, the influence of the packaging on the electric field of the chip gradually increases. The electric field at the surface of the chip termination greatly increases or even exceeds the maximum electric field in the chip. Furthermore, by the distributed capacitance model, the mechanical explanation of the influence of packaging was given. Finally, the influences of the charge density of the semiconductor-insulator interface and the dielectric constant of the packaging on the electric field of the chip were analyzed. The results of this paper could provide a reference for the insulation design of high-voltage and high-power devices。
作者
刘招成
崔翔
李学宝
刘相辰
李超
赵志斌
金锐
唐新灵
和峰
LIU Zhaocheng;CUI Xiang;LI Xuebao;LIU Xiangchen;LI Chao;ZHAO Zhibin;JIN Rui;TANG Xinling;HE Feng(State Key Laboratory of Alternate Electrical Power System with Renewable Energy Sources(North China Electric Power University),Changping District,Beijing 102206,China;State Key Laboratory of Advanced Power Transmission Technology(Global Energy Interconnection Research Institute Co.,Ltd.),Changping District,Beijing 102209,China)
出处
《中国电机工程学报》
EI
CSCD
北大核心
2023年第1期274-283,共10页
Proceedings of the CSEE
基金
国家自然科学基金项目(52077073)。
关键词
IGBT器件绝缘
弹性压接型IGBT
封装结构
边界条件
芯片终端
IGBT device insulation
elastic press-pack IGBT
packaging structure
boundary conditions
chip termination structure
