摘要
设计了一款基于SMIC 0.18μm标准CMOS工艺的14-bit CMOS分段式数模转换芯片.采用5+4+5分段式结构,通过二进制计码和温度计码结合的方法对输入数字量进行译码.通过使用高输出阻抗的共源共栅电流源结构提高了DAC整体性能.采用了Q2随机漫步选择方法对电流源和开关阵列进行版图布局,保证了版图的对称性和减少梯度误差的影响.最终在信号频率为0.999 3MHz,采样频率为200MHz的情况下,SFDR后仿真结果超过90dB.
A 14-bit current-steering digital to analog converter with segmented structure is designed and fabricated by SMIC 0.18μm technology in this paper.It adopts 5＋4＋5segmented architecture and both binary and thermometer decoder are resulted in this design.Cascode current source construction is adopted to improve its output impedance which is crucial to the performance of the proposed DAC.Q2 Random Walk switching scheme is applied to ensure the systematic and decrease the graded errors in the layout of current source.With 0.999 3 MHz input signal and 200 MHz sample clock the SFDR of the DAC is over 90 dB.
出处
《微电子学与计算机》
CSCD
北大核心
2016年第7期79-82,共4页
Microelectronics & Computer
