摘要
文章介绍了用 EDA技术作为开发手段 ,实现数字频率计的设计。系统基于 VHDL语言 ,以 CPLD为核心 ,具有体积小、可靠性高。
The design of a digital cymometer with EDA technology is presented in the paper Based on VHDL, and with CPLD as its core, this system features small volume, high reliability and good flexibility
出处
《微电子学》
CAS
CSCD
北大核心
2002年第3期234-237,共4页
Microelectronics
