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信号上升或下降时间对高速电路信号完整性影响的研究 被引量:18

Effects of Signal Rise or Fall Time on High-speed Circuit's Signal Integrity
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摘要 为了研究信号上升或下降时间对信号完整性的影响,从理论上分析论证了信号上升或下降时间是造成反射,串扰,同步开关噪声及电磁干扰等信号完整性问题的根本原因。利用Cadence公司的SigXplorer仿真软件建立相应的拓扑电路,通过对IBIS模型信号上升时间参数进行修改,分别在不同信号上升时间和信号频率下进行仿真。通过对仿真结果的对比分析,验证了理论分析的正确性。提出了信号上升或下降时间是造成信号完整性问题的根本原因的观点,纠正了从信号频率上分析信号完整性问题的误区。 To study the effects of signal rise or fail time on signal integrity, the root cause which produces reflection,crosstalk, simultaneous switching noise and electromagnetic interference caused by signal rise or fall time,which may influence the signal integrity, is theoretically analyzed and demonstrated. SigXplorer simulation software of Cadence company was employed to establish the corresponding circuit topology. The simulation was performed respectively at different signal rise time and signal frequency, by modifying the parameters of signal rise time of the IBIS models.The correctness of the theoretical analysis was demonstrated with comparative analysis of the simulation results. The innovations in the paper are:put forth a view point that signal rise or fall time is the root cause which may influence the signal integrity, correct the misconception that analyze signal integrity problems from signal frequency.
作者 周路 贾宝富
出处 《现代电子技术》 2011年第6期69-73,77,共6页 Modern Electronics Technique
关键词 高速电路 信号完整性 信号上升时间 IBIS SigXplorer high-speed circuit signal integrity signal rise time IBIS SigXplorer
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