摘要
介绍了一种嵌入于FPGA(fieldprogrammable gatearray)的网络监控系统的设计过程,给出了以FPGA为核心构建的"输入输出控制+逻辑控制器+数据处理+网络接口控制"的系统硬件设计结构。利用Altera SOPC(system on programmable chip)技术,在FPGA内部构建了NiosIICPU,并内嵌实时内核uC/OS-Ⅱ,由uC/OS-Ⅱ完成对网络控制器DM9000A以及整个系统的任务调度和管理,完成对连接在系统上的设备状态的远程实时监控。测试结果表明,该系统占用资源少,工作稳定、可靠,满足功能需求。
The design process of net watching and commanding system which is embedded in FPGA is introduced,and the system design frame centered with FPGA of ＂IO control＋ logical control＋ data processing＋ net interface control＂ is put forward.The system using the technology of Altera SOPC to construct NiosII CPU which embeds Real-system uC/OS-Ⅱ within FPGA,and uC/OS-Ⅱfinishes the manager of net controller DM9000A and even all the system,and finishes the long-distance real-time watching and commanding of the external equipments.Tests show that system occupies less resources and works stably.The system satisfies the requirement.
出处
《计算机工程与设计》
CSCD
北大核心
2010年第24期5211-5215,共5页
Computer Engineering and Design
