摘要
为了在高速采集时不丢失数据,在数据采集系统和CPU之间设置一个数据暂存区。介绍双口RAM的存储原理及其在数字系统中的应用。采用FPGA技术构造双口RAM,实现高速信号采集系统中的海量数据存储和时钟匹配。功能仿真验证该设计的正确性,该设计能减小电路设计的复杂性,增强设计的灵活性和资源的可配置性能,降低设计成本,缩短开发周期。
In order to not lose data in high-speed data acquisition, a data buffer is set between the data acquisition system and CPU.This paper describes the storage principle and application of dual port RAM in digital system.The dual-pert RAM is constructed with the FPGA technology,which realizes mass data saving and clock matching in the high speed signal acquisition system.The function simulation results prove the correctness of the design.The design reduces the complexity of circuit design,and enhances design flexibility and configurability of resources,reduces the design cost and shortens the development cycle.
出处
《电子设计工程》
2010年第2期72-74,共3页
Electronic Design Engineering
