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基于FPGA的旋转编码器抗抖动四倍频电路设计 被引量:6

The Anti-jitter Fourfold Frequency Multiplication Circuit Design of a Rotary Encoder Based on FPGA
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摘要 本文分析了旋转编码器工作原理,设计了一种高精度抗抖动四倍频电路。它主要由鉴相电路、脉冲加减计数电路、抗干扰电路、抗抖动电路和四倍频电路组成。电路采用Altera公司生产的FPGA,利用VHDL语言设计,具有计数频率高、可同时对多个编码器信号进行记数的优点。QuartusⅡ7.2的仿真结果表明,该电路准确可靠,定位精度明显提高,能有效地消除抖动的影响。 The working principle of rotary encoder is analyzed, and a high-precision anti-jitter fourfold frequency multiplication circuit for rotary encoder is designed. It mainly consists of the phase-determination circuit, the up/down counting circuit, the anti-disturbance and anti-jitter circuit, and the fourfold frequency multiplication circuit. Using the FPGA manufactured by Altera Co. , we propose the design of a four-frequency multiplication circuit by the VHDL language based on the advantages of high counting frequency and counting several eneoder signals at the same time. Simulation results by Quartus Ⅱ 7.2 indicate that the fourfold frequency circuit designed by the hardware description language circuit is accurate and reliable, and its positioning accuracy is improved markedly, which effectively eliminates the impact of jitter.
出处 《计算机工程与科学》 CSCD 北大核心 2009年第7期92-94,共3页 Computer Engineering & Science
关键词 旋转编码器 抗抖动 四倍频 FPGA rotary encoder eliminate jitter four frequency multiplicatiom FPGA
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