Ultrafine particle (UFP)alumina has been prepared by supereritical fluid drying process of inorganic salt with organic solvent system, which is reported for the first time. UFP-alumina prepared from this system is fea...Ultrafine particle (UFP)alumina has been prepared by supereritical fluid drying process of inorganic salt with organic solvent system, which is reported for the first time. UFP-alumina prepared from this system is featured by its hish specific surface area, large pore volume, small perticle size and low bulk density.展开更多
A novel low-voltage,low constant-impedance switch is proposed, which not only eliminates the parasitic capacitor but also reduces the variation of switch ＂on＂ resistance. With the gain-boost technology,the operation...A novel low-voltage,low constant-impedance switch is proposed, which not only eliminates the parasitic capacitor but also reduces the variation of switch ＂on＂ resistance. With the gain-boost technology,the operational transconductance amplifier used in this analog-to-digital converter （ADC） achieves enough DC gain and unity-gain frequency under the low voltage supply and to guarantee the performance of the sample and hold circuit （S/H） and the sub-stages. Based on these methods,a 10bit 100Msps pipelined ADC is fabricated in a 0. 18μm CMOS process and operates under a 1.8V voltage supply. The ADC achieves an SNR of 54. 2dB （input frequency of 6.26MHz） and an SNR of 49. 8dB （input frequency of 48. 96MHz） when the sampling frequency is 100MHz.展开更多
文摘Ultrafine particle (UFP)alumina has been prepared by supereritical fluid drying process of inorganic salt with organic solvent system, which is reported for the first time. UFP-alumina prepared from this system is featured by its hish specific surface area, large pore volume, small perticle size and low bulk density.
文摘A novel low-voltage,low constant-impedance switch is proposed, which not only eliminates the parasitic capacitor but also reduces the variation of switch ＂on＂ resistance. With the gain-boost technology,the operational transconductance amplifier used in this analog-to-digital converter （ADC） achieves enough DC gain and unity-gain frequency under the low voltage supply and to guarantee the performance of the sample and hold circuit （S/H） and the sub-stages. Based on these methods,a 10bit 100Msps pipelined ADC is fabricated in a 0. 18μm CMOS process and operates under a 1.8V voltage supply. The ADC achieves an SNR of 54. 2dB （input frequency of 6.26MHz） and an SNR of 49. 8dB （input frequency of 48. 96MHz） when the sampling frequency is 100MHz.
