Microbatteries(MBs)are crucial to power miniaturized devices for the Internet of Things.In the evolutionary journey of MBs,fabrication technology emerges as the cornerstone,guiding the intricacies of their configurati...Microbatteries(MBs)are crucial to power miniaturized devices for the Internet of Things.In the evolutionary journey of MBs,fabrication technology emerges as the cornerstone,guiding the intricacies of their configuration designs,ensuring precision,and facilitating scalability for mass production.Photolithography stands out as an ideal technology,leveraging its unparalleled resolution,exceptional design flexibility,and entrenched position within the mature semiconductor industry.However,comprehensive reviews on its application in MB development remain scarce.This review aims to bridge that gap by thoroughly assessing the recent status and promising prospects of photolithographic microfabrication for MBs.Firstly,we delve into the fundamental principles and step-by-step procedures of photolithography,offering a nuanced understanding of its operational mechanisms and the criteria for photoresist selection.Subsequently,we highlighted the specific roles of photolithography in the fabrication of MBs,including its utilization as a template for creating miniaturized micropatterns,a protective layer during the etching process,a mold for soft lithography,a constituent of MB active component,and a sacrificial layer in the construction of micro-Swiss-roll structure.Finally,the review concludes with a summary of the key challenges and future perspectives of MBs fabricated by photolithography,providing comprehensive insights and sparking research inspiration in this field.展开更多
Multidimensional integration and multifunctional com-ponent assembly have been greatly explored in recent years to extend Moore’s Law of modern microelectronics.However,this inevitably exac-erbates the inhomogeneity ...Multidimensional integration and multifunctional com-ponent assembly have been greatly explored in recent years to extend Moore’s Law of modern microelectronics.However,this inevitably exac-erbates the inhomogeneity of temperature distribution in microsystems,making precise temperature control for electronic components extremely challenging.Herein,we report an on-chip micro temperature controller including a pair of thermoelectric legs with a total area of 50×50μm^(2),which are fabricated from dense and flat freestanding Bi2Te3-based ther-moelectric nano films deposited on a newly developed nano graphene oxide membrane substrate.Its tunable equivalent thermal resistance is controlled by electrical currents to achieve energy-efficient temperature control for low-power electronics.A large cooling temperature difference of 44.5 K at 380 K is achieved with a power consumption of only 445μW,resulting in an ultrahigh temperature control capability over 100 K mW^(-1).Moreover,an ultra-fast cooling rate exceeding 2000 K s^(-1) and excellent reliability of up to 1 million cycles are observed.Our proposed on-chip temperature controller is expected to enable further miniaturization and multifunctional integration on a single chip for microelectronics.展开更多
The advancement of integrated optical communication networks necessitates the deployment of on-chip beam splitters for efficient signal interconnections at network nodes.However,the pursuit of micron-scale beam splitt...The advancement of integrated optical communication networks necessitates the deployment of on-chip beam splitters for efficient signal interconnections at network nodes.However,the pursuit of micron-scale beam splitting with large corners and reducing the device footprint to boost connection flexibility often results in phase mismatches.These mismatches,which stem from radiation modes and backward scattering,pose significant obstacles in creating highly integrated and interference-resistant connections.To address this,we introduce a solution based on the topological valley-contrasting state generated by photonic crystals with opposing valley Chern numbers,manifested in a harpoon-shaped structure designed to steer the splitting channels.This approach enables adiabatic mode field evolution over large corners,capitalizing on the robust phase modulation capabilities and topological protection provided by the subwavelength-scale valley-contrasting state.Our demonstration reveals that beam splitters with large corners of 60°,90°,and 120°exhibit insertion loss fluctuations below 2.7 dB while maintaining a minimal footprint of 8.8μm×8.8μm.As a practical demonstration,these devices facilitate three-channel signal connections,successfully transmitting quadrature phase shift keying signals at 3.66 Tbit/s with bit error rates below the forward error correction threshold,demonstrating performance comparable to that in defects scenarios.By harnessing the unidirectional excitation feature,we anticipate significant enhancements in the capabilities of signal distribution and connection networks through a daisy chain configuration.展开更多
Integrated photonic devices are essential for on-chip optical communication,optical-electronic systems,and quantum information sciences.To develop a high-fidelity interface between photonics in various frequency domai...Integrated photonic devices are essential for on-chip optical communication,optical-electronic systems,and quantum information sciences.To develop a high-fidelity interface between photonics in various frequency domains without disturbing their quantum properties,nonlinear frequency conversion,typically steered with the quadratic(χ2)process,should be considered.Furthermore,another degree of freedom in steering the spatial modes during theχ2 process,with unprecedent mode intensity is proposed here by modulating the lithium niobate(LN)waveguide-based inter-mode quasi-phasematching conditions with both temperature and wavelength parameters.Under high incident light intensities(25 and 27.8 dBm for the pump and the signal lights,respectively),mode conversion at the sum-frequency wavelength with sufficient high output power(−7–8 dBm)among the TM01,TM10,and TM00 modes is realized automatically with characterized broad temperature(ΔT≥8°C)and wavelength windows(Δλ≥1 nm),avoiding the previous efforts in carefully preparing the signal or pump modes.The results prove that high-intensity spatial modes can be prepared at arbitrary transparent wavelength of theχ2 media toward on-chip integration,which facilitates the development of chip-based communication and quantum information systems because spatial correlations can be applied to generate hyperentangled states and provide additional robustness in quantum error correction with the extended Hilbert space.展开更多
GaN-based devices have developed significantly in recent years due to their promising applications and research potential.A major goal is to monolithically integrate various GaN-based components onto a single chip to ...GaN-based devices have developed significantly in recent years due to their promising applications and research potential.A major goal is to monolithically integrate various GaN-based components onto a single chip to create future optoelectronic systems with low power consumption.This miniaturized integration not only enhances multifunctional performance but also reduces material,processing,and packaging costs.In this study,we present an optoelectronic on-chip system fabricated using a top-down approach on a III-nitride-on-silicon wafer.The system includes a near-ultraviolet light source,a monitor,a 180°bent waveguide,an electro-absorption modulator,and a receiver,all integrated without the need for regrowth or post-growth doping.35 Mbit/s optical data communication is demonstrated through light propagation within the system,confirming its potential for compact GaN-based optoelectronic solutions.展开更多
On-chip global buses in deep sub-micron designs consume significant amounts of energy and have large propagation delays. Thus, minimizing energy dissipation and propagation delay is an important design objective. In t...On-chip global buses in deep sub-micron designs consume significant amounts of energy and have large propagation delays. Thus, minimizing energy dissipation and propagation delay is an important design objective. In this paper, we propose a new spatial and temporal encoding approach for generic on-chip global buses with repeaters that enables higher performance while reducing peak energy and average energy. The proposed encoding approach exploits the benefits of a temporal encoding circuit and spatial bus-invert coding techniques to simultaneously eliminate opposite transitions on adjacent wires and reduce the number of self-transitions and coupling-transitions. In the design process of applying encoding techniques for reduced bus delay and energy, we present a repeater insertion design methodology to determine the repeater size and inter-repeater bus length, which minimizes the total bus energy dissipation while satisfying target delay and slew-rate constraints. This methodology is employed to obtain optimal energy versus delay trade-offs under slew-rate constraints for various encoding techniques.展开更多
Dual pn junctions in lateral and vertical directions are formed by diffusing the p^＋ on the patterned n-well in standard CMOS technology, which are inserted under the inductor in order to reduce the currents in the s...Dual pn junctions in lateral and vertical directions are formed by diffusing the p^＋ on the patterned n-well in standard CMOS technology, which are inserted under the inductor in order to reduce the currents in the substrate induced by the electromagnetic field from the inductor. The thickness of high resistance is not equivalent to the width of the depletion region of the vertical pn junctions,but the depth of the bottom pn junction in the substrate are both proposed and validated. For the first time, through the grounded p^＋-diffusion layer shielding the suhstrate from the electric field of the inductor, the width of the depletion regions of the lateral and vertical pn junctions are changed by increasing the voltage applied to the n wells. The quality factor is improved or reduced with the thickness of high resistance by 19%. This phenomenon validates the theory that the pn junction substrate isolation can reduce the loss caused by the currents in the substrate induced by the electromagnetic field from the inductor.展开更多
Gas identification and concentration measurements are important for both understanding and monitoring a variety of phenomena from industrial processes to environmental change.Here a novel mid-IR plasmonic gas sensor w...Gas identification and concentration measurements are important for both understanding and monitoring a variety of phenomena from industrial processes to environmental change.Here a novel mid-IR plasmonic gas sensor with on-chip direct readout is proposed based on unity integration of narrowband spectral response,localized field enhancement and thermal detection.A systematic investigation consisting of both optical and thermal simulations for gas sensing is presented for the first time in three sensing modes including refractive index sensing,absorption sensing and spectroscopy,respectively.It is found that a detection limit less than 100 ppm for CO2 could be realized by a combination of surface plasmon resonance enhancement and metal-organic framework gas enrichment with an enhancement factor over 8000 in an ultracompact optical interaction length of only several microns.Moreover,on-chip spectroscopy is demonstrated with the compressive sensing algorithm via a narrowband plasmonic sensor array.An array of 80 such sensors with an average resonance linewidth of 10 nm reconstructs the CO2 molecular absorption spectrum with the estimated resolution of approximately 0.01 nm far beyond the state-of-the-art spectrometer.The novel device design and analytical method are expected to provide a promising technique for extensive applications of distributed or portable mid-IR gas sensor.展开更多
Design aspects of CMOS compatible on-chip antenna for applications of contact-less smart card are discussed.An on-chip antenna model is established and a design method is demonstrated.Experimental results show that sy...Design aspects of CMOS compatible on-chip antenna for applications of contact-less smart card are discussed.An on-chip antenna model is established and a design method is demonstrated.Experimental results show that system-on-chip integrating power reception together with other electronic functions of smart card applications is feasible.In a 6×10 -4T magnetic field of 22.5MHz,an on-chip power of 1.225mW for a 10kΩ load is obtained using a 4mm2 on-chip antenna.展开更多
Photonic integrated circuits(PICs)provide a promising platform for miniaturized on-chip optical systems for communication,computation,and sensing applications.The dense integration of photonic components is one of the...Photonic integrated circuits(PICs)provide a promising platform for miniaturized on-chip optical systems for communication,computation,and sensing applications.The dense integration of photonic components is one of the keys to exploit the advantages of PIC.Although light focusing is a fundamental and indispensable function in PICs,focusing light at the micro/nanometer-scale is challenging.Here,a bigradient on-chip metalens(BOML)is proposed to achieve ultrasmall focal lengths and spot sizes at the subwavelength scale for dense PICs.The design of BOML combines gradient geometry and gradient refractive index into one metalens by simultaneously engineering the length and width of subwavelength silicon slots.With a small device footprint of only 168μm,the BOML achieves efficient on-chip focusing with the recordbreaking figure-of-merits,which are the ratio of wavelength to focal length/spot size(0.268 and 2.83)and numerical aperture(1.78).Leveraging on the Fresnel design,the footprint of BOML is further reduced by 55.1%,and the numerical aperture is enhanced to 1.9.The demonstration of mode conversion and beam steering with efficiency over 80%and a tilting range of 7.2°holds the potential for highly dense on-chip photonic systems for optical communication,optical sensing,nonlinear optics,and neural networks for deep learning.展开更多
Raman lasers based on integrated silica whispering gallery mode resonant cavities have enabled numerous applications from telecommunications to biodetection. To overcome the intrinsically low Raman gain value of silic...Raman lasers based on integrated silica whispering gallery mode resonant cavities have enabled numerous applications from telecommunications to biodetection. To overcome the intrinsically low Raman gain value of silica, these devices leverage their ultrahigh quality factors(Q), allowing submilliwatt stimulated Raman scattering(SRS) lasing thresholds to be achieved. A closely related nonlinear behavior to SRS is stimulated anti-Stokes Raman scattering(SARS). This nonlinear optical process combines the pump photon with the SRS photon to generate an upconverted photon. Therefore, in order to achieve SARS, the efficiency of the SRS process must be high. As a result, achieving SARS in on-chip resonant cavities has been challenging due to the low lasing efficiencies of these devices. In the present work, metal-doped ultrahigh Q(Q > 10~7) silica microcavity arrays are fabricated on-chip. The metal-dopant plays multiple roles in improving the device performance. It increases the Raman gain of the cavity material, and it decreases the optical mode area, thus increasing the circulating intensity. As a result, these devices have SRS lasing efficiencies that are over 10× larger than conventional silica microcavities while maintaining low lasing thresholds. This combination enables SARS to be generated with submilliwatt input powers and significantly improved anti-Stokes Raman lasing efficiency.展开更多
A cold preamplifier based on superconducting quantum interference devices(SQUIDs)is currently the preferred readout technology for the low-noise transition edge sensor(TES).In this work,we have designed and fabricated...A cold preamplifier based on superconducting quantum interference devices(SQUIDs)is currently the preferred readout technology for the low-noise transition edge sensor(TES).In this work,we have designed and fabricated a series SQUID array(SSA)amplifier for the TES detector readout circuit.In this SSA amplifier,each SQUID cell is composed of a first-order gradiometer formed using two equally large square washers,and an on-chip low pass filter(LPF)as a radiofrequency(RF)choke has been developed to reduce the Josephson oscillation interference between individual SQUID cells.In addition,a highly symmetric layout has been designed carefully to provide a fully consistent embedded electromagnetic environment and achieve coherent flux operation.The measured results show smooth V-Φcharacteristics and a swing voltage that increases linearly with increasing SQUID cell number N.A white flux noise level as low as 0.28μφ;/Hz;is achieved at 0.1 K,corresponding to a low current noise level of 7 pA/Hz;.We analyze the measured noise contribution at mK-scale temperatures and find that the dominant noise derives from a combination of the SSA intrinsic noise and the equivalent current noise of the room temperature electronics.展开更多
This paper presents a technique for low noise figure reduction of low-noise amplifier (LNA). The proposed LNA is designed in a source degeneration technique that offers lower noise figure. The resistance of the on-chi...This paper presents a technique for low noise figure reduction of low-noise amplifier (LNA). The proposed LNA is designed in a source degeneration technique that offers lower noise figure. The resistance of the on-chip inductor is reduced by using multilayer that significantly reduces the thermal noise due to spiral inductor. Also, using spiral inductor as a gate inductor reduces the effect of the input parasitic capacitance on the noise figure and provides a good matching at the input and output of the LNA. The results of the LNA using multilayer on-chip inductor compared will off-chip inductor have been illustrated. It shows that the proposed technique reduces significantly the noise figure and improves the matching. The proposed LNA is designed in 0.13 μm process with 1.3 V supply voltage and simulated using Advanced Design System (ADS) software. The simulation results show that the LNA is unconditionally stable and provides a forward gain of 11.087 dB at operating frequency of 15 GHz with 1.784 dB noise figure and input and output impedance matching of –17.93 dB, and –10.04 dB.展开更多
A single mode hybrid Ⅲ-Ⅴ/silicon on-chip laser based on the flip-chip bonding technology for on-chip optical interconnection is demonstrated. A single mode Fabry-Perot laser structure with micro-structures on an InP...A single mode hybrid Ⅲ-Ⅴ/silicon on-chip laser based on the flip-chip bonding technology for on-chip optical interconnection is demonstrated. A single mode Fabry-Perot laser structure with micro-structures on an InP ridge waveguide is designed and fabricated on an InP/AIGaInAs multiple quantum well epitaxial layer structure wafer by using i-line lithography. Then, a silicon waveguide platform including a laser mounting stage is designed and fabricated on a silicon-on-insulator substrate. The single mode laser is flip-chip bonded on the laser mounting stage. The lasing light is butt-coupling to the silicon waveguide. The laser power output from a silicon waveguide is 1.3roW, and the threshold is 37mA at room temperature and continuous wave operation.展开更多
In the complex multicore chip system,network on-chip(NoC)is viewed as a kind of system interconnection that can substitute the traditional interconnect networks,which will improve the system performance and communicat...In the complex multicore chip system,network on-chip(NoC)is viewed as a kind of system interconnection that can substitute the traditional interconnect networks,which will improve the system performance and communication efficiency.With regard to the complex and large scale NoC,simple and efficient routing nodes are the critical factors to achieve low-cost and low-congestion communication performance.This paper proposes an unbuffered switch architecture and makes detailed analysis of the mechanism of buffer in the switch architecture.According to the simulation results,the S-mesh using the unbuffered switch architecture is better in terms of the optimal performance in message latency than some typical NoC architectures,such as 2D-mesh,Fat-tree,Butterfly,Octagon and so on.The synthesis results of design compiler indicate that the unbuffered switch has obvious advantages of achieving cost and operating speed for the chips.展开更多
Capillary electrophoresis (CE) suffers from a relatively small sensitivity—at least in case of optical detection transversely to the capillary axis due to the small capillary inner diameters in the range of 50 - 100 ...Capillary electrophoresis (CE) suffers from a relatively small sensitivity—at least in case of optical detection transversely to the capillary axis due to the small capillary inner diameters in the range of 50 - 100 μm. Different concepts like bubble, U-, or Z-cells have been used to tackle that problem already in the nineties of the last century. But the U- and Z-cells have typically been extra cells with larger inner channel diameters and no optimization for optical waveguiding and the bubble cell per se did not allow for optical waveguiding. In the case of on-chip capillary electrophoresis (chip-CE) a U-cell can be implemented quite easily on the chip. Here we show how leaky optical waveguiding can be employed to improve optical detection. Proper U-channel design and preparation by wet-chemical etching of the fused silica sub- and superstrate, making the U-channel bend a part of the optical input lens system, can help to achieve high coupling efficiency with loss coefficients around 2 dB and low waveguiding loss.展开更多
Compared with the traditional and inter-chip networks, on-chip networks （NoCs） have enormous wire resources which can be traded for improving other performance requirements. This means that much wider data links can...Compared with the traditional and inter-chip networks, on-chip networks （NoCs） have enormous wire resources which can be traded for improving other performance requirements. This means that much wider data links can be used for NoCs. This paper focuses on the area costs for on-chip routers under four different data-link widths： 8 bits, 16 bits, 128 bits, and 256bits. Firstly, a virtual-channel based on-chip router is introduced. Secondly, the components of the router are implemented by Verilog HDL models and synthesized by Quartus II 4.0 in a FPGA device. Finally, the area costs are analyzed. It can be seen from the results that data-link width has great influence on area costs of buffers and crossbar while has no influence on area costs of arbiter.展开更多
The identification and clarification of active sites of MoS_(2)have long been the focus of research efforts in hydrogen evolution reaction(HER).In this study,we constructed phase transition-induced 1T-2H MoS_(2)hetero...The identification and clarification of active sites of MoS_(2)have long been the focus of research efforts in hydrogen evolution reaction(HER).In this study,we constructed phase transition-induced 1T-2H MoS_(2)heterojunction via lithium intercalation and evaluated the HER activity using on-chip electrocatalytic microdevices(OCEMs).The heterojunction achieved an overpotential of only 226 mV at a cathodic current density of 10 mA/cm^(2),outperforming the basal planes of 1T and 2H MoS_(2).Furthermore,density functional theory(DFT)calculations demonstrated that the charge redistribution occurs at the 1T-2H MoS_(2)interface with electrons transferring from 1T to 2H MoS_(2),and the interfacial S atom at the top site of 1T MoS_(2)presents the smallest overpotential of 0.37 V.Moreover,the interference from highly active edge sites was avoided by precisely exposing specific active areas,quantitatively revealing the catalytic activity order of different types of in-plane MoS_(2)active sites.This work enables a systematic investigation of the HER activity of various active sites in MoS_(2),laying the foundation for quantitative analysis of activity in other lowdimensional materials.展开更多
Miniaturized fiber-Bragg-grating(FBG)interrogators are of interest for applications in the areas where weight and size controlling is important,e.g.,airplanes and aerospace or in-situ monitoring.An ultra-compact high-...Miniaturized fiber-Bragg-grating(FBG)interrogators are of interest for applications in the areas where weight and size controlling is important,e.g.,airplanes and aerospace or in-situ monitoring.An ultra-compact high-precision on-chip interrogator is proposed based on a tailored arrayed waveguide grating(AWG)on a silicon-on-insulator(SOI)platform.The on-chip interrogator enables continuous wavelength interrogation from 1544 nm to 1568 nm with the wavelength accuracy of less than 1 pm[the root-mean-square error(RMSE)is 0.73 pm]over the whole wavelength range.The chip loss is less than 5 dB.The 1×16 AWG is optimized to achieve a large bandwidth and a low noise level at each channel,and the FBG reflection peaks can be detected by multiple output channels of the AWG.The fabricated AWG is utilized to interrogate FBG sensors through the center of gravity(CoG)algorithm.The validation of an on-chip FBG interrogator that works with sub-picometer wavelength accuracy in a broad wavelength range shows large potential for applications in miniaturized fiber optic sensing systems.展开更多
Lens-free on-chip microscopy with RGB LEDs(LFOCM-RGB)provides a portable,cost-effective,and high-throughput imaging tool for resource-limited environments.However,the weak coherence of LEDs limits the high-resolution ...Lens-free on-chip microscopy with RGB LEDs(LFOCM-RGB)provides a portable,cost-effective,and high-throughput imaging tool for resource-limited environments.However,the weak coherence of LEDs limits the high-resolution imaging,and the luminous surfaces of the LED chips on the RGB LED do not overlap,making the coherence-enhanced executions tend to undermine the portable and cost-effective implementation.Here,we propose a specially designed pinhole array to enhance coherence in a portable and cost-effective implementation.It modulates the three-color beams from the RGB LED separately so that the three-color beams effectively overlap on the sample plane while reducing the effective light-emitting area for better spatial coherence.The separate modulation of the spatial coherence allows the temporal coherence to be modulated separately by single spectral filters rather than by expensive triple spectral filters.Based on the pinhole array,the LFOCM-RGB simply and effectively realizes the high-resolution imaging in a portable and cost-effective implementation,offering much flexibility for various applications in resource-limited environments.展开更多
基金supported by the National Natural Science Foundation of China(22125903,22439003,22209175)the National Key R&D Program of China(Grant 2022YFA1504100,2023YFB4005204)+1 种基金the Energy Revolution S&T Program of Yulin Innovation Institute of Clean Energy(Grant E412010508)the State Key Laboratory of Catalysis(No:2024SKL-A-001)。
文摘Microbatteries(MBs)are crucial to power miniaturized devices for the Internet of Things.In the evolutionary journey of MBs,fabrication technology emerges as the cornerstone,guiding the intricacies of their configuration designs,ensuring precision,and facilitating scalability for mass production.Photolithography stands out as an ideal technology,leveraging its unparalleled resolution,exceptional design flexibility,and entrenched position within the mature semiconductor industry.However,comprehensive reviews on its application in MB development remain scarce.This review aims to bridge that gap by thoroughly assessing the recent status and promising prospects of photolithographic microfabrication for MBs.Firstly,we delve into the fundamental principles and step-by-step procedures of photolithography,offering a nuanced understanding of its operational mechanisms and the criteria for photoresist selection.Subsequently,we highlighted the specific roles of photolithography in the fabrication of MBs,including its utilization as a template for creating miniaturized micropatterns,a protective layer during the etching process,a mold for soft lithography,a constituent of MB active component,and a sacrificial layer in the construction of micro-Swiss-roll structure.Finally,the review concludes with a summary of the key challenges and future perspectives of MBs fabricated by photolithography,providing comprehensive insights and sparking research inspiration in this field.
基金The authors thank D.Berger,D.Hofmann and C.Kupka in IFW Dresden for helpful technical support.H.R.acknowledges funding from the DFG(Deutsche Forschungsgemeinschaft)within grant number RE3973/1-1.Q.J.,H.R.and K.N.conceived the work.With the support from N.Y.and X.J.,Q.J.and T.G.fabricated the thermoelectric films and conducted the structural and compositional characterizations.Q.J.prepared microchips and fabricated the on-chip micro temperature controllers.Q.J.and N.P.carried out the temperature-dependent material and device performance measurements.Q.J.and H.R.performed the simulation and analytical calculations.Q.J.,H.R.and K.N.wrote the manuscript with input from the other coauthors.All the authors discussed the results and commented on the manuscript.
文摘Multidimensional integration and multifunctional com-ponent assembly have been greatly explored in recent years to extend Moore’s Law of modern microelectronics.However,this inevitably exac-erbates the inhomogeneity of temperature distribution in microsystems,making precise temperature control for electronic components extremely challenging.Herein,we report an on-chip micro temperature controller including a pair of thermoelectric legs with a total area of 50×50μm^(2),which are fabricated from dense and flat freestanding Bi2Te3-based ther-moelectric nano films deposited on a newly developed nano graphene oxide membrane substrate.Its tunable equivalent thermal resistance is controlled by electrical currents to achieve energy-efficient temperature control for low-power electronics.A large cooling temperature difference of 44.5 K at 380 K is achieved with a power consumption of only 445μW,resulting in an ultrahigh temperature control capability over 100 K mW^(-1).Moreover,an ultra-fast cooling rate exceeding 2000 K s^(-1) and excellent reliability of up to 1 million cycles are observed.Our proposed on-chip temperature controller is expected to enable further miniaturization and multifunctional integration on a single chip for microelectronics.
基金supported by the National Natural Science Foundation of China(Grant No.62271322)Guangdong Basic and Applied Basic Research Foundation(Grant No.2023A1515030152)+3 种基金Shenzhen Science and Technology Program(Grant No.JCYJ20210324095610027)Natural Science Foundation of Top Talent of SZTU(Grant No.GDRC202204)Qianxinan Prefecture Science and Technology Plan Project(Grant No.2023123)Scientific Research Fund Project of Minzu Normal University of Xingyi(Grant No.23XYZD07)。
文摘The advancement of integrated optical communication networks necessitates the deployment of on-chip beam splitters for efficient signal interconnections at network nodes.However,the pursuit of micron-scale beam splitting with large corners and reducing the device footprint to boost connection flexibility often results in phase mismatches.These mismatches,which stem from radiation modes and backward scattering,pose significant obstacles in creating highly integrated and interference-resistant connections.To address this,we introduce a solution based on the topological valley-contrasting state generated by photonic crystals with opposing valley Chern numbers,manifested in a harpoon-shaped structure designed to steer the splitting channels.This approach enables adiabatic mode field evolution over large corners,capitalizing on the robust phase modulation capabilities and topological protection provided by the subwavelength-scale valley-contrasting state.Our demonstration reveals that beam splitters with large corners of 60°,90°,and 120°exhibit insertion loss fluctuations below 2.7 dB while maintaining a minimal footprint of 8.8μm×8.8μm.As a practical demonstration,these devices facilitate three-channel signal connections,successfully transmitting quadrature phase shift keying signals at 3.66 Tbit/s with bit error rates below the forward error correction threshold,demonstrating performance comparable to that in defects scenarios.By harnessing the unidirectional excitation feature,we anticipate significant enhancements in the capabilities of signal distribution and connection networks through a daisy chain configuration.
基金financial supports from National Key Research and Development Program of China(2021YFB3602500)Self-deployment Project of Fujian Science&Technology Innovation Laboratory for Optoelectronic Information of China(2021ZZ101)National Natural Science Foundation of China(Grant Nos.62275247 and 61905246).
文摘Integrated photonic devices are essential for on-chip optical communication,optical-electronic systems,and quantum information sciences.To develop a high-fidelity interface between photonics in various frequency domains without disturbing their quantum properties,nonlinear frequency conversion,typically steered with the quadratic(χ2)process,should be considered.Furthermore,another degree of freedom in steering the spatial modes during theχ2 process,with unprecedent mode intensity is proposed here by modulating the lithium niobate(LN)waveguide-based inter-mode quasi-phasematching conditions with both temperature and wavelength parameters.Under high incident light intensities(25 and 27.8 dBm for the pump and the signal lights,respectively),mode conversion at the sum-frequency wavelength with sufficient high output power(−7–8 dBm)among the TM01,TM10,and TM00 modes is realized automatically with characterized broad temperature(ΔT≥8°C)and wavelength windows(Δλ≥1 nm),avoiding the previous efforts in carefully preparing the signal or pump modes.The results prove that high-intensity spatial modes can be prepared at arbitrary transparent wavelength of theχ2 media toward on-chip integration,which facilitates the development of chip-based communication and quantum information systems because spatial correlations can be applied to generate hyperentangled states and provide additional robustness in quantum error correction with the extended Hilbert space.
基金This work was supported in part by the National Natural Science Founda⁃tion of China under Grant No.U21A20495National Key Research and De⁃velopment Program of China under Grant No.2022YFE0112000High⁃er Education Discipline Innovation Project under Grant No.D17018.
文摘GaN-based devices have developed significantly in recent years due to their promising applications and research potential.A major goal is to monolithically integrate various GaN-based components onto a single chip to create future optoelectronic systems with low power consumption.This miniaturized integration not only enhances multifunctional performance but also reduces material,processing,and packaging costs.In this study,we present an optoelectronic on-chip system fabricated using a top-down approach on a III-nitride-on-silicon wafer.The system includes a near-ultraviolet light source,a monitor,a 180°bent waveguide,an electro-absorption modulator,and a receiver,all integrated without the need for regrowth or post-growth doping.35 Mbit/s optical data communication is demonstrated through light propagation within the system,confirming its potential for compact GaN-based optoelectronic solutions.
文摘On-chip global buses in deep sub-micron designs consume significant amounts of energy and have large propagation delays. Thus, minimizing energy dissipation and propagation delay is an important design objective. In this paper, we propose a new spatial and temporal encoding approach for generic on-chip global buses with repeaters that enables higher performance while reducing peak energy and average energy. The proposed encoding approach exploits the benefits of a temporal encoding circuit and spatial bus-invert coding techniques to simultaneously eliminate opposite transitions on adjacent wires and reduce the number of self-transitions and coupling-transitions. In the design process of applying encoding techniques for reduced bus delay and energy, we present a repeater insertion design methodology to determine the repeater size and inter-repeater bus length, which minimizes the total bus energy dissipation while satisfying target delay and slew-rate constraints. This methodology is employed to obtain optimal energy versus delay trade-offs under slew-rate constraints for various encoding techniques.
文摘Dual pn junctions in lateral and vertical directions are formed by diffusing the p^＋ on the patterned n-well in standard CMOS technology, which are inserted under the inductor in order to reduce the currents in the substrate induced by the electromagnetic field from the inductor. The thickness of high resistance is not equivalent to the width of the depletion region of the vertical pn junctions,but the depth of the bottom pn junction in the substrate are both proposed and validated. For the first time, through the grounded p^＋-diffusion layer shielding the suhstrate from the electric field of the inductor, the width of the depletion regions of the lateral and vertical pn junctions are changed by increasing the voltage applied to the n wells. The quality factor is improved or reduced with the thickness of high resistance by 19%. This phenomenon validates the theory that the pn junction substrate isolation can reduce the loss caused by the currents in the substrate induced by the electromagnetic field from the inductor.
基金We are grateful for financial supports from National Key Research and Development Program of China(No.2019YFB2203402)National Natural Science Foundation of China(Nos.11774383,11774099,11874029)+3 种基金Guangdong Science and Technology Program International Cooperation Program(2018A050506039)Guangdong Natural Science Founds for Distinguished Young Scholars(No.2020B151502074),Pearl River Talent Plan Program of Guangdong(No.2019QN01X120)Fundamental Research Funds for the Central Universities,Royal Society Newton Advanced Fellowship(No.NA140301)Key Frontier Scientific Research Program of the Chinese Academy of Sciences(No.QYZDBSSW-JSC014).
文摘Gas identification and concentration measurements are important for both understanding and monitoring a variety of phenomena from industrial processes to environmental change.Here a novel mid-IR plasmonic gas sensor with on-chip direct readout is proposed based on unity integration of narrowband spectral response,localized field enhancement and thermal detection.A systematic investigation consisting of both optical and thermal simulations for gas sensing is presented for the first time in three sensing modes including refractive index sensing,absorption sensing and spectroscopy,respectively.It is found that a detection limit less than 100 ppm for CO2 could be realized by a combination of surface plasmon resonance enhancement and metal-organic framework gas enrichment with an enhancement factor over 8000 in an ultracompact optical interaction length of only several microns.Moreover,on-chip spectroscopy is demonstrated with the compressive sensing algorithm via a narrowband plasmonic sensor array.An array of 80 such sensors with an average resonance linewidth of 10 nm reconstructs the CO2 molecular absorption spectrum with the estimated resolution of approximately 0.01 nm far beyond the state-of-the-art spectrometer.The novel device design and analytical method are expected to provide a promising technique for extensive applications of distributed or portable mid-IR gas sensor.
文摘Design aspects of CMOS compatible on-chip antenna for applications of contact-less smart card are discussed.An on-chip antenna model is established and a design method is demonstrated.Experimental results show that system-on-chip integrating power reception together with other electronic functions of smart card applications is feasible.In a 6×10 -4T magnetic field of 22.5MHz,an on-chip power of 1.225mW for a 10kΩ load is obtained using a 4mm2 on-chip antenna.
基金Advanced Research and Technology Innovation CentreA*STAR,Grant/Award Number:A18A5b0056+1 种基金National Research Foundation-Singapore,Grant/Award Numbers:NRF-CRP15-2015-02,RIE2020-AME-2019National University of Singapore,Grant/Award Number:R261-518-009-720。
文摘Photonic integrated circuits(PICs)provide a promising platform for miniaturized on-chip optical systems for communication,computation,and sensing applications.The dense integration of photonic components is one of the keys to exploit the advantages of PIC.Although light focusing is a fundamental and indispensable function in PICs,focusing light at the micro/nanometer-scale is challenging.Here,a bigradient on-chip metalens(BOML)is proposed to achieve ultrasmall focal lengths and spot sizes at the subwavelength scale for dense PICs.The design of BOML combines gradient geometry and gradient refractive index into one metalens by simultaneously engineering the length and width of subwavelength silicon slots.With a small device footprint of only 168μm,the BOML achieves efficient on-chip focusing with the recordbreaking figure-of-merits,which are the ratio of wavelength to focal length/spot size(0.268 and 2.83)and numerical aperture(1.78).Leveraging on the Fresnel design,the footprint of BOML is further reduced by 55.1%,and the numerical aperture is enhanced to 1.9.The demonstration of mode conversion and beam steering with efficiency over 80%and a tilting range of 7.2°holds the potential for highly dense on-chip photonic systems for optical communication,optical sensing,nonlinear optics,and neural networks for deep learning.
基金Northrop GrummanOffice of Naval Research(ONR)(N00014-17-2270)
文摘Raman lasers based on integrated silica whispering gallery mode resonant cavities have enabled numerous applications from telecommunications to biodetection. To overcome the intrinsically low Raman gain value of silica, these devices leverage their ultrahigh quality factors(Q), allowing submilliwatt stimulated Raman scattering(SRS) lasing thresholds to be achieved. A closely related nonlinear behavior to SRS is stimulated anti-Stokes Raman scattering(SARS). This nonlinear optical process combines the pump photon with the SRS photon to generate an upconverted photon. Therefore, in order to achieve SARS, the efficiency of the SRS process must be high. As a result, achieving SARS in on-chip resonant cavities has been challenging due to the low lasing efficiencies of these devices. In the present work, metal-doped ultrahigh Q(Q > 10~7) silica microcavity arrays are fabricated on-chip. The metal-dopant plays multiple roles in improving the device performance. It increases the Raman gain of the cavity material, and it decreases the optical mode area, thus increasing the circulating intensity. As a result, these devices have SRS lasing efficiencies that are over 10× larger than conventional silica microcavities while maintaining low lasing thresholds. This combination enables SARS to be generated with submilliwatt input powers and significantly improved anti-Stokes Raman lasing efficiency.
基金supported by the National Key Research and Development Program of China(Grant No.2017YFA0304003)。
文摘A cold preamplifier based on superconducting quantum interference devices(SQUIDs)is currently the preferred readout technology for the low-noise transition edge sensor(TES).In this work,we have designed and fabricated a series SQUID array(SSA)amplifier for the TES detector readout circuit.In this SSA amplifier,each SQUID cell is composed of a first-order gradiometer formed using two equally large square washers,and an on-chip low pass filter(LPF)as a radiofrequency(RF)choke has been developed to reduce the Josephson oscillation interference between individual SQUID cells.In addition,a highly symmetric layout has been designed carefully to provide a fully consistent embedded electromagnetic environment and achieve coherent flux operation.The measured results show smooth V-Φcharacteristics and a swing voltage that increases linearly with increasing SQUID cell number N.A white flux noise level as low as 0.28μφ;/Hz;is achieved at 0.1 K,corresponding to a low current noise level of 7 pA/Hz;.We analyze the measured noise contribution at mK-scale temperatures and find that the dominant noise derives from a combination of the SSA intrinsic noise and the equivalent current noise of the room temperature electronics.
文摘This paper presents a technique for low noise figure reduction of low-noise amplifier (LNA). The proposed LNA is designed in a source degeneration technique that offers lower noise figure. The resistance of the on-chip inductor is reduced by using multilayer that significantly reduces the thermal noise due to spiral inductor. Also, using spiral inductor as a gate inductor reduces the effect of the input parasitic capacitance on the noise figure and provides a good matching at the input and output of the LNA. The results of the LNA using multilayer on-chip inductor compared will off-chip inductor have been illustrated. It shows that the proposed technique reduces significantly the noise figure and improves the matching. The proposed LNA is designed in 0.13 μm process with 1.3 V supply voltage and simulated using Advanced Design System (ADS) software. The simulation results show that the LNA is unconditionally stable and provides a forward gain of 11.087 dB at operating frequency of 15 GHz with 1.784 dB noise figure and input and output impedance matching of –17.93 dB, and –10.04 dB.
基金Supported by the National Basic Research Program of China under Grant No 2012CB933501the National Natural Science Foundation of China under Grant Nos 61307033,61274070,61137003 and 61321063
文摘A single mode hybrid Ⅲ-Ⅴ/silicon on-chip laser based on the flip-chip bonding technology for on-chip optical interconnection is demonstrated. A single mode Fabry-Perot laser structure with micro-structures on an InP ridge waveguide is designed and fabricated on an InP/AIGaInAs multiple quantum well epitaxial layer structure wafer by using i-line lithography. Then, a silicon waveguide platform including a laser mounting stage is designed and fabricated on a silicon-on-insulator substrate. The single mode laser is flip-chip bonded on the laser mounting stage. The lasing light is butt-coupling to the silicon waveguide. The laser power output from a silicon waveguide is 1.3roW, and the threshold is 37mA at room temperature and continuous wave operation.
基金Supported by the National High Technology Research and Development Program of China(No.2009AA01Z105)the Ministry of EducationIntel Special Foundation for Information Technology(No.MOE-INTEL-08-05)the Postdoctoral Science Foundation of China(No.20080440942,200902432)
文摘In the complex multicore chip system,network on-chip(NoC)is viewed as a kind of system interconnection that can substitute the traditional interconnect networks,which will improve the system performance and communication efficiency.With regard to the complex and large scale NoC,simple and efficient routing nodes are the critical factors to achieve low-cost and low-congestion communication performance.This paper proposes an unbuffered switch architecture and makes detailed analysis of the mechanism of buffer in the switch architecture.According to the simulation results,the S-mesh using the unbuffered switch architecture is better in terms of the optimal performance in message latency than some typical NoC architectures,such as 2D-mesh,Fat-tree,Butterfly,Octagon and so on.The synthesis results of design compiler indicate that the unbuffered switch has obvious advantages of achieving cost and operating speed for the chips.
文摘Capillary electrophoresis (CE) suffers from a relatively small sensitivity—at least in case of optical detection transversely to the capillary axis due to the small capillary inner diameters in the range of 50 - 100 μm. Different concepts like bubble, U-, or Z-cells have been used to tackle that problem already in the nineties of the last century. But the U- and Z-cells have typically been extra cells with larger inner channel diameters and no optimization for optical waveguiding and the bubble cell per se did not allow for optical waveguiding. In the case of on-chip capillary electrophoresis (chip-CE) a U-cell can be implemented quite easily on the chip. Here we show how leaky optical waveguiding can be employed to improve optical detection. Proper U-channel design and preparation by wet-chemical etching of the fused silica sub- and superstrate, making the U-channel bend a part of the optical input lens system, can help to achieve high coupling efficiency with loss coefficients around 2 dB and low waveguiding loss.
文摘Compared with the traditional and inter-chip networks, on-chip networks （NoCs） have enormous wire resources which can be traded for improving other performance requirements. This means that much wider data links can be used for NoCs. This paper focuses on the area costs for on-chip routers under four different data-link widths： 8 bits, 16 bits, 128 bits, and 256bits. Firstly, a virtual-channel based on-chip router is introduced. Secondly, the components of the router are implemented by Verilog HDL models and synthesized by Quartus II 4.0 in a FPGA device. Finally, the area costs are analyzed. It can be seen from the results that data-link width has great influence on area costs of buffers and crossbar while has no influence on area costs of arbiter.
基金support from the National Key R&D Program of China(Nos.2021YFA1202802,2022YFF0712200,and 2022YFE0127400)the National Natural Science Foundation of China(No.22409037)+1 种基金the Young Elite Scientists Sponsorship Program by BAST(No.BYESS2023410)the CAS Pioneer Hundred Talents Program.
文摘The identification and clarification of active sites of MoS_(2)have long been the focus of research efforts in hydrogen evolution reaction(HER).In this study,we constructed phase transition-induced 1T-2H MoS_(2)heterojunction via lithium intercalation and evaluated the HER activity using on-chip electrocatalytic microdevices(OCEMs).The heterojunction achieved an overpotential of only 226 mV at a cathodic current density of 10 mA/cm^(2),outperforming the basal planes of 1T and 2H MoS_(2).Furthermore,density functional theory(DFT)calculations demonstrated that the charge redistribution occurs at the 1T-2H MoS_(2)interface with electrons transferring from 1T to 2H MoS_(2),and the interfacial S atom at the top site of 1T MoS_(2)presents the smallest overpotential of 0.37 V.Moreover,the interference from highly active edge sites was avoided by precisely exposing specific active areas,quantitatively revealing the catalytic activity order of different types of in-plane MoS_(2)active sites.This work enables a systematic investigation of the HER activity of various active sites in MoS_(2),laying the foundation for quantitative analysis of activity in other lowdimensional materials.
基金This work wasssupported by the National Natural Science Foundation of China(Grant Nos.62020106002 and 61735017)Innovation Project of Zhejiang Laboratory(Grant No.2021MG0AL01)+2 种基金the Youth Foundation of Zhejiang Laboratory(Grant No.2020MC0AA08)Major Scientific Research Project of Zhejiang Laboratory(Grant No.2019MC0AD02)National Key Basic Research Program of China(Grant No.2021YFC2401403).
文摘Miniaturized fiber-Bragg-grating(FBG)interrogators are of interest for applications in the areas where weight and size controlling is important,e.g.,airplanes and aerospace or in-situ monitoring.An ultra-compact high-precision on-chip interrogator is proposed based on a tailored arrayed waveguide grating(AWG)on a silicon-on-insulator(SOI)platform.The on-chip interrogator enables continuous wavelength interrogation from 1544 nm to 1568 nm with the wavelength accuracy of less than 1 pm[the root-mean-square error(RMSE)is 0.73 pm]over the whole wavelength range.The chip loss is less than 5 dB.The 1×16 AWG is optimized to achieve a large bandwidth and a low noise level at each channel,and the FBG reflection peaks can be detected by multiple output channels of the AWG.The fabricated AWG is utilized to interrogate FBG sensors through the center of gravity(CoG)algorithm.The validation of an on-chip FBG interrogator that works with sub-picometer wavelength accuracy in a broad wavelength range shows large potential for applications in miniaturized fiber optic sensing systems.
基金supported by the Shenzhen Key Basic Program(No.JCYJ20200109143031287)the Shenzhen General Basic Program(No.WDZC20220816110140002)。
文摘Lens-free on-chip microscopy with RGB LEDs(LFOCM-RGB)provides a portable,cost-effective,and high-throughput imaging tool for resource-limited environments.However,the weak coherence of LEDs limits the high-resolution imaging,and the luminous surfaces of the LED chips on the RGB LED do not overlap,making the coherence-enhanced executions tend to undermine the portable and cost-effective implementation.Here,we propose a specially designed pinhole array to enhance coherence in a portable and cost-effective implementation.It modulates the three-color beams from the RGB LED separately so that the three-color beams effectively overlap on the sample plane while reducing the effective light-emitting area for better spatial coherence.The separate modulation of the spatial coherence allows the temporal coherence to be modulated separately by single spectral filters rather than by expensive triple spectral filters.Based on the pinhole array,the LFOCM-RGB simply and effectively realizes the high-resolution imaging in a portable and cost-effective implementation,offering much flexibility for various applications in resource-limited environments.
