The reverse generation current under high-gate-voltage stress condition in LDD nMOSFET＇s is studied. We find that the generation current peak decreases as the stress time increases. We ascribe this finding to the dom...The reverse generation current under high-gate-voltage stress condition in LDD nMOSFET＇s is studied. We find that the generation current peak decreases as the stress time increases. We ascribe this finding to the dominating oxide trapped electrons that reduce the effective drain bias, lowering the maximal generation rate. The density of the effective trapped electrons affecting the effective drain bias is calculated with our model.展开更多
The degradation characteristics of both wide and narrow devices under V _g= V _d/2 stress mode is investigated.The width-enhanced device degradation can be seen with devices narrowing.The main degradation mechanism is...The degradation characteristics of both wide and narrow devices under V _g= V _d/2 stress mode is investigated.The width-enhanced device degradation can be seen with devices narrowing.The main degradation mechanism is interface state generation for pMOSFETs with different channel width.The cause of the width-enhanced device degradation is attributed to the combination of width-enhanced threshold voltage and series resistance.展开更多
In this paper, different electrical measurement and operation methods of resistive random access memory （RRAM） have been summarized, including voltage sweeping mode （VSM）, current sweeping mode （CSM）, co lstant ...In this paper, different electrical measurement and operation methods of resistive random access memory （RRAM） have been summarized, including voltage sweeping mode （VSM）, current sweeping mode （CSM）, co lstant current stress （CCS）, constant voltage stress （CVS）, rectangular pulse mode （RPM）, and triangle pulse mode （TPM）. Meanwhile, the effects of these meas- urement methods on the forming, set, reset and read operation as well as endurance performance have been compared. Finally, their respective controllability of various resistive switching parameters have been summar zeal and analyzed.展开更多
文摘The reverse generation current under high-gate-voltage stress condition in LDD nMOSFET＇s is studied. We find that the generation current peak decreases as the stress time increases. We ascribe this finding to the dominating oxide trapped electrons that reduce the effective drain bias, lowering the maximal generation rate. The density of the effective trapped electrons affecting the effective drain bias is calculated with our model.
文摘The degradation characteristics of both wide and narrow devices under V _g= V _d/2 stress mode is investigated.The width-enhanced device degradation can be seen with devices narrowing.The main degradation mechanism is interface state generation for pMOSFETs with different channel width.The cause of the width-enhanced device degradation is attributed to the combination of width-enhanced threshold voltage and series resistance.
基金supported by the National Natural Science Foundation of China(Grant Nos.61322408,61221004,61422407,61334007,61474136,61274091,61376112,61306117,61106119,and 61106082)National Basic Research Program of China(Grant No.2011CBA00602)National High Technology Research and Development Program of China(Grant Nos.2014AA032900,2013AA030801,2011AA010401 and 2011AA-010402)
文摘In this paper, different electrical measurement and operation methods of resistive random access memory （RRAM） have been summarized, including voltage sweeping mode （VSM）, current sweeping mode （CSM）, co lstant current stress （CCS）, constant voltage stress （CVS）, rectangular pulse mode （RPM）, and triangle pulse mode （TPM）. Meanwhile, the effects of these meas- urement methods on the forming, set, reset and read operation as well as endurance performance have been compared. Finally, their respective controllability of various resistive switching parameters have been summar zeal and analyzed.
