SiC MOSFET与Si MOSFET由于和IGBT具有很好的兼容性发展尤其迅速,但又因缺乏栅极电容CGS和COX参数提取的有效手段,影响了其性能评价、模型仿真以及应用水平的提高。该文在分析Si C MOSFET典型的电阻负载电路基础上,针对其导通过程中栅...SiC MOSFET与Si MOSFET由于和IGBT具有很好的兼容性发展尤其迅速,但又因缺乏栅极电容CGS和COX参数提取的有效手段,影响了其性能评价、模型仿真以及应用水平的提高。该文在分析Si C MOSFET典型的电阻负载电路基础上,针对其导通过程中栅极电流变化会带来栅极电容CGS和COX计算上的困难,提出增加恒流源电路维持Si C MOSFET导通过程栅极驱动电流恒定,从而只需简单计算便可提取栅极电容CGS和COX参数的实验方法。针对某一型号具体器件进行了参数提取实验,所得到的结果与datasheet的结果较吻合,验证了该方法的有效性;另外,不同负载、环境温度对采用文中方法得到的栅极电容CGS和COX结果影响较小,而不同直流电压对栅极电容CGS结果影响较大,较高直流电压下参数提取的结果较稳定。展开更多
Al Ga N/Ga N高电子迁移率晶体管的栅极电容由本征电容和边缘电容组成.边缘电容分为外部边缘电容和内部边缘电容,内部边缘电容相比外部边缘电容对器件的开关转换特性更为敏感.本文基于内部边缘电容的形成机理,推导了内部边缘电容C_(ifs...Al Ga N/Ga N高电子迁移率晶体管的栅极电容由本征电容和边缘电容组成.边缘电容分为外部边缘电容和内部边缘电容,内部边缘电容相比外部边缘电容对器件的开关转换特性更为敏感.本文基于内部边缘电容的形成机理,推导了内部边缘电容C_(ifs/d)模型,进一步的分析表明,其与器件的栅极偏置强相关;基于WardDutton电荷分配原则推导了相应的本征电容模型,最后结合外部边缘电容得到了完整的栅极电容模型.由于边缘电容是由器件结构产生的寄生电容,仿真结果表明,若不考虑边缘电容的影响,栅源电容的误差可达80%以上,而栅漏电容的误差可达65%以上.因此,在高频开关应用领域,边缘电容对栅极电容的影响不可忽略.展开更多
The technique to improve the performance of W/TiN stacked gate MOS capacitor with 3nm gate oxide is reported by optimizing the sputtering process of a refractory metal gate electrode and adopting a proper anneal tempe...The technique to improve the performance of W/TiN stacked gate MOS capacitor with 3nm gate oxide is reported by optimizing the sputtering process of a refractory metal gate electrode and adopting a proper anneal temperature to eliminate the damages.Specific methods involved in the optimization of sputtering process include:selecting a proper TiN thickness to reduce stresses;using a smaller sputtering rate to suppress the damages to gate dielectric and adopting a higher N 2/Ar ratio during the TiN sputtering process to further nitride the gate dielectric.With these measures,excellent C V curves are obtained and surface state density ( N ss ) is successfully reduced to below 8×10 10 cm -2 ,which is comparable to the polysilicon gate MOS capacitor.展开更多
A buried-oxide trench-gate bipolar-mode JFET （BTB-JFET） with an oxide layer buried under the gate region to reduce the gate-drain capacitance Cgd is proposed. Simulations with a resistive load circuit for power loss...A buried-oxide trench-gate bipolar-mode JFET （BTB-JFET） with an oxide layer buried under the gate region to reduce the gate-drain capacitance Cgd is proposed. Simulations with a resistive load circuit for power loss comparison at high frequency application are performed with 20V-rated power switching devices,including a BTB-JFET,a trench MOSFET （T-MOSFET） generally applied in present industry, and a conventional trench-gate bipolar-mode JFET （TB-JFET） without buried oxide,for the first time. The simulation results indicate that the switching power loss of the normally-on BTB-JFET is improved by 37% and 14% at 1MHz compared to the T-MOSFET and the normally-on TB-JFET, respectively. In order to demonstrate the validity of the simulation, the normally-on TB-JFET and BTB-JFET have been fabricated successfully for the first time, where the buried oxide structure is realized by thermal oxidation. The experimental results show that the Cgd of the BTB-JFET is decreased by 45% from that of the TB-JFET at zero source-drain bias. Compared to the TB-JFET,the switching time and switching power loss of the BTB-JFET decrease approximately by 7. 4% and 11% at 1MHz,respectively. Therefore,the normally-on BTB-JFET could be pointing to a new direction for the R＆D of low volt- age and high frequency switching devices.展开更多
文摘SiC MOSFET与Si MOSFET由于和IGBT具有很好的兼容性发展尤其迅速,但又因缺乏栅极电容CGS和COX参数提取的有效手段,影响了其性能评价、模型仿真以及应用水平的提高。该文在分析Si C MOSFET典型的电阻负载电路基础上,针对其导通过程中栅极电流变化会带来栅极电容CGS和COX计算上的困难,提出增加恒流源电路维持Si C MOSFET导通过程栅极驱动电流恒定,从而只需简单计算便可提取栅极电容CGS和COX参数的实验方法。针对某一型号具体器件进行了参数提取实验,所得到的结果与datasheet的结果较吻合,验证了该方法的有效性;另外,不同负载、环境温度对采用文中方法得到的栅极电容CGS和COX结果影响较小,而不同直流电压对栅极电容CGS结果影响较大,较高直流电压下参数提取的结果较稳定。
文摘Al Ga N/Ga N高电子迁移率晶体管的栅极电容由本征电容和边缘电容组成.边缘电容分为外部边缘电容和内部边缘电容,内部边缘电容相比外部边缘电容对器件的开关转换特性更为敏感.本文基于内部边缘电容的形成机理,推导了内部边缘电容C_(ifs/d)模型,进一步的分析表明,其与器件的栅极偏置强相关;基于WardDutton电荷分配原则推导了相应的本征电容模型,最后结合外部边缘电容得到了完整的栅极电容模型.由于边缘电容是由器件结构产生的寄生电容,仿真结果表明,若不考虑边缘电容的影响,栅源电容的误差可达80%以上,而栅漏电容的误差可达65%以上.因此,在高频开关应用领域,边缘电容对栅极电容的影响不可忽略.
文摘The technique to improve the performance of W/TiN stacked gate MOS capacitor with 3nm gate oxide is reported by optimizing the sputtering process of a refractory metal gate electrode and adopting a proper anneal temperature to eliminate the damages.Specific methods involved in the optimization of sputtering process include:selecting a proper TiN thickness to reduce stresses;using a smaller sputtering rate to suppress the damages to gate dielectric and adopting a higher N 2/Ar ratio during the TiN sputtering process to further nitride the gate dielectric.With these measures,excellent C V curves are obtained and surface state density ( N ss ) is successfully reduced to below 8×10 10 cm -2 ,which is comparable to the polysilicon gate MOS capacitor.
文摘A buried-oxide trench-gate bipolar-mode JFET （BTB-JFET） with an oxide layer buried under the gate region to reduce the gate-drain capacitance Cgd is proposed. Simulations with a resistive load circuit for power loss comparison at high frequency application are performed with 20V-rated power switching devices,including a BTB-JFET,a trench MOSFET （T-MOSFET） generally applied in present industry, and a conventional trench-gate bipolar-mode JFET （TB-JFET） without buried oxide,for the first time. The simulation results indicate that the switching power loss of the normally-on BTB-JFET is improved by 37% and 14% at 1MHz compared to the T-MOSFET and the normally-on TB-JFET, respectively. In order to demonstrate the validity of the simulation, the normally-on TB-JFET and BTB-JFET have been fabricated successfully for the first time, where the buried oxide structure is realized by thermal oxidation. The experimental results show that the Cgd of the BTB-JFET is decreased by 45% from that of the TB-JFET at zero source-drain bias. Compared to the TB-JFET,the switching time and switching power loss of the BTB-JFET decrease approximately by 7. 4% and 11% at 1MHz,respectively. Therefore,the normally-on BTB-JFET could be pointing to a new direction for the R＆D of low volt- age and high frequency switching devices.
